Conformal thin films over textured capacitor electrodes
US6780704B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 1999 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Dec 3, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/265
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method and structures are provided for conformal capacitor dielectrics over textured silicon electrodes for integrated memory cells. Capacitor structures and first electrodes or plates are formed above or within semiconductor substrates. The first electrodes include hemispherical grain (HSG) silicon for increasing the capacitor plate surface area. The HSG topography is then exposed to alternating chemistries to form monolayers of a desired dielectric material. Exemplary process flows include alternately pulsed metal organic and oxygen source gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with oxygen. Near perfect step coverage allows minimal thickness for a capacitor dielectric, given leakage concerns for particular materials, thereby maximizing the capacitance for the memory cell and increasing cell reliability for a given memory cell design. Alternately pulsed chemistries are also provided for depositing top electrode materials with continuous coverage of capacitor dielectric, realizing the full capacitance benefits of the underlying textured morphology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.