Method of fabricating a wafer level chip size package utilizing a maskless exposure
US6780748B2 · kind B2 · utility
91Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2002 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Jul 30, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49222
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In the re-wiring formation process of a WLCSP, at least some of the re-wiring lines 3 that connect the bonding pads 1 and bump pads 2 of the semiconductor chips are formed using a photolithographic process that does not use a photomask. In this re-wiring formation process, standard portions are formed by development following photomask exposure, and portions that are to be designed corresponding to customer specifications are subjected to additional development following additional maskless exposure in the final stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.