Method and apparatus for accessing internal nodes of an integrated circuit using IC package substrate
US6781218B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 4, 2003 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Mar 4, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for accessing internal nodes of an integrated circuit using a package substrate are provided. Embodiments of the present invention include an integrated circuit comprising an integrated circuit die comprising a principal side; a conductive element formed on the principal side of the integrated circuit die; a package substrate comprising a principal side facing the principal side of the integrated circuit die; a conductive element located on the principal side of the package substrate; a transmission path wherein a first end of the transmission path is coupled to the conductive element of the integrated circuit die and wherein a second end of the transmission path is coupled to the conductive element of the package substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.