Method of manufacturing a semiconductor device with a self-aligned contact
US6784097B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2003 |
| Grant date | Aug 31, 2004 |
| Priority date | — |
| Expiry date | Apr 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device having a self-aligned contact includes providing a semiconductor substrate having a self-aligned contact region and a non-self-aligned contact region, forming a first insulating layer on the semiconductor substrate, forming a plurality of conductive patterns on the first insulating layer, forming sequentially second, third and fourth insulating layers over the entire surface of the semiconductor substrate, etching the fourth insulating layer to form spacers on sidewalls of the conductive patterns, forming sequentially fifth and sixth insulating layers over the entire surface of the semiconductor substrate; and etching the sixth insulating layer using a portion of the fifth insulating layer over the self-aligned contact region as an etch stopper, and etching the fifth insulating lever to form a self-aligned contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.