Guided-wave optical interconnections embedded within a microelectronic wafer-level batch package
US6785458B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2002 |
| Grant date | Aug 31, 2004 |
| Priority date | — |
| Expiry date | Feb 11, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12107
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.