Dynamic threshold voltage MOS transistor fitted with a current limiter
US6787850B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 27, 2001 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | Jul 27, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
The invention concerns a semi-conductor device comprising on a substrate:a first dynamic threshold voltage MOS transistor (10), with a gate (116), and a channel (111) of a first conductivity type, anda current limiter means (20) connected between the gate and the channel of said first transistor.In accordance with the invention, this first transistor is fitted with a first doped zone (160) of the first conductivity type, connected to the channel, and the current limiter means comprises a second doped zone (124) of a second conductivity type, placed against the first doped zone and electrically connected to the first zone by an ohmic connection.Application to the manufacture of CMOS circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.