Chip scale marker and method of calibrating marking position
US6794205B2 · kind B2 · utility
1Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2003 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Jul 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/681
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip scale marker including a laser system, a wafer holder supporting a wafer to be processed, and a camera moving above the wafer holder by being connected to an X-Y stage and monitoring the wafer supported on a center hole of the wafer holder, the chip scale marker includes a unit detachably arranged on a laser beam path from the laser system and reducing power density of a laser beam, and a screen arranged on a center hole of the wafer holder and indicating a position where a laser beam from the laser system is irradiated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.