Lateral heterojunction bipolar transistor
US6794237B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2002 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Dec 6, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A heterojunction bipolar transistor (30) in a silicon-on-insulator (SOI) structure is disclosed. The transistor collector (28), heterojunction base region (20), and intrinsic emitter region (25) are formed in the thin film silicon layer (6) overlying the buried insulator layer (4). A base electrode (10) is formed of polysilicon, and has a polysilicon filament (10f) that extends over the edge of an insulator layer (8) to contact the silicon layer (6). After formation of insulator filaments (12) along the edges of the base electrode (10) and insulator layer (8), the thin film silicon layer (6) is etched through, exposing an edge. An angled ion implantation then implants the heterojunction species, for example germanium and carbon, into the exposed edge of the thin film silicon layer (6), which after anneal forms the heterojunction base region (20). Polysilicon plugs for the emitter (24e) and collector (24c) are then formed, from which dopant diffuses to form the intrinsic emitter (25) and subcollector (22) of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.