Internal voltage converter scheme for controlling the power-up slope of internal supply voltage
US6795366B2 · kind B2 · utility
13Cited by
5References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 15, 2002 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Oct 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/465
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Ramping voltage circuits are described for augmenting or supplying a higher power-up slope upon initial power-up or a wake-up transition from a period of dormancy to a semiconductor memory device. Such ramping voltage circuits are responsive to a power-up signal, and are capable of increasing by at least two orders of magnitude the power-up slope, thereby enabling far quicker device turn-on. In one embodiment, a level shifter is used to ramp up the power-on voltage. In another embodiment, the internal voltage line is effectively shorted to an external voltage line via a power-up turned-on PMOS or depletion-type NMOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.