Method for forming a semiconductor device and a semiconductor device formed by the method
US6797591B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2000 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Sep 14, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a multi-layer semiconductor device (1) having a lower silicon layer (4), an intermediate silicon layer (5) within which micro-mirrors (10) are formed and an upper spacer layer (6) of silicon for spacing another component from the micro-mirrors (10). First and second etch stop layers (8,9) of oxide act as insulation between the respective layers (4,5,6). In order to minimize damage to the micro-mirrors (10), the formation of the micro-mirrors (10) is left to the end of the forming process. An assembly of the lower layer (4) and the intermediate layer (5) with the first etch stop layer (8) is formed, and the second etch stop layer (9) is then grown and patterned on the intermediate layer (5) for subsequent formation of the micro-mirrors (10). The upper layer (5) is then bonded by an annealing process to the patterned second etch stop layer (9). After the formation of communicating bores (30) in the lower layer (4) and thinning of the first etch stop layer (8) adjacent the micro-mirrors (10) through the communicating bores (30), openings (16) in the upper layer (6) and the micro-mirrors (10) are sequentially formed by reactive ion etching through the upper layer (…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.