Method for dividing semiconductor wafer
US6803247B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 23, 2003 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Oct 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68327
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for dicing a semiconductor wafer wherein a semiconductor wafer (W) with circuits in many regions sectioned by crosswise streets is diced into individual semiconductor chips each having a circuit. The circuit face of the semiconductor wafer (W) is covered with a tape member (10), and a part of the tape member (10) covering the top of the streets is removed by cutting to form a cut groove (11). The semiconductor wafer (W) dear of the part of the tape member (10) covering the top of the crosswise streets is chemically etched to erode the crosswise streets and thus diced into individual semiconductor chips. This economical method enables formation of high quality chips free of cracks or stresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.