Method to salicide source-line in flash memory with STI
US6803273B1 · kind B1 · utility
9Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2000 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | May 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A method of forming a semiconductor component having a conductive line (24) and a silicide region (140) that crosses a trench (72). The method involves forming nitride sidewalls (130) to protect the stack during the silicidation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.