High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process
US6803306B2 · kind B2 · utility
10Cited by
9References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 4, 2001 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Jun 9, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/957
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal-insulator-metal (MIM) capacitor is made according to a copper dual-damascene process. A first copper or copper alloy metal layer if formed on a substrate. A portion of the first metal layer is utilized as the lower plate of the MIM capacitor. An etch stop dielectric layer is used during etching of subsequent layers. A portion of an etch stop layer is not removed and is utilized as the insulator for the MIM capacitor. A second copper or copper alloy metal layer is later formed on the substrate. A portion of the second metal layer is utilized as the upper plate of the MIM capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.