Vertical charge control semiconductor device
US6803626B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2002 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Jul 18, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/115
Abstract
In accordance with an embodiment of the present invention, a MOSFET includes at least two insulation-filled trench regions laterally spaced in a first semiconductor region to form a drift region therebetween, and at least one resistive element located along an outer periphery of each of the two insulation-filled trench regions. A ratio of a width of each of the insulation-filled trench regions to a width of the drift region is adjusted so that an output capacitance of the MOSFET is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.