Semiconductor die package having mesh power and ground planes
US6803650B2 · kind B2 · utility
5Cited by
5References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 31, 2001 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | May 31, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R12/52
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.