Method and apparatus for reassembly of data blocks within a network processor
US6804692B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2001 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Feb 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for reassembling data blocks back into their constituent data packets in a network processor. Each data block associated with a packet is assigned a unique queue identifier for use in assembling all blocks from the same packet. The packet is also assigned a packet identifier, a start of packet identifier and an end of packet identifier for use by downstream network processors to process the packet. The blocks are assembled according to the assigned queue identifier until the last block of a packet is received, at which time the packet reassembly is complete.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.