Develop processing method of a resist surface on a substrate for reduced processing time and reduced defect density
US6806209B2 · kind B2 · utility
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13References
42Claims
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Key dates
| Filing date | May 1, 2003 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | May 1, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/3021
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A develop process for reduced cycle time and reduced defects in the develop process for semiconductor/IC fabrication is shown. The use of a linear slit scan nozzle provides even distribution of a layer of develop material within an acceptable thickness and uniformity range such that a pre-wet step is not needed to spread the develop material evenly over the surface of a wafer. The use of a whip operation prior to rinsing with DI water significantly reduces develop defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.