Semiconductor device structure including multiple fets having different spacer widths
US6806584B2 · kind B2 · utility
33Cited by
21References
8Claims
0Family size
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Key dates
| Filing date | Oct 21, 2002 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Oct 21, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
Abstract
A semiconductor device structure includes at least two field effect transistors formed on same substrate, the first field effect transistor includes a spacer having a first width, the second field effect transistor includes a spacer having a second width, the first width being different than said second width. Preferably, the first width is narrower than the second width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.