Reference gamma compensation voltage generation circuit
US6806861B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2000 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Dec 30, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The object of the present invention is to reduce the number of inputs to LCD driver chips, and to suppress the occurrence of variances between the chips.A ten bit wide binary counter 202 is self activated in synchronization with a system clock. Each of multiple five-step shift registers 200 having ten bit widths stores gamma compensation data received from a PC. Each of multiple comparators 204 compares a binary counter value (X) with a value (Y) stored in a ten bit wide five-step shift register 200, and converts the gamma compensation data into a pulse width. The output of each comparator 204 is latched by each of multiple D-FFs 206 in synchronization with the system clock, and each of multiple time/voltage converters 208 passes the output of a D-FF 206 through an LPF and generates a reference gamma compensation voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.