Fast program to program verify method
US6807105B2 · kind B2 · utility
14Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2003 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | May 2, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3454
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In the present invention a new method for program and program verify is described. The threshold voltage of the memory cell is shifted up and then measured with minimal charging and discharging of the bit lines and control gate lines. Bit line to control gate line capacitance is also used to reduce the number of voltage references needed. Program current is reduced by use of a load device coupled to the source diffusion. The result is increased program bandwidth with lower high voltage charge pump current consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.