Flip chip package carrier
US6809262B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 13, 2003 |
| Grant date | Oct 26, 2004 |
| Priority date | — |
| Expiry date | Aug 13, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10674
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip chip package carrier having a substrate is disclosed. The substrate has a surface with a plurality of bonding pads for connecting with a chip. A solder mask layer covers the substrate. The solder mask layer has a solder mask opening that exposes the bonding pads. Furthermore, a solder layer covers the surface of the bonding pads for increasing the bonding strength between the bonding pads and the conductive bumps in a subsequent flip chip bonding operation. Since the large area solder mask opening completely exposes all the bonding pads, equipment with less alignment precision can be used to form the solder mask layer and its associated solder mask opening. Thus, the cost of producing the flip chip package carrier is lowered and the distance of separation between neighboring bonding pads is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.