Regulation method for the drain, body and source terminals voltages in a non-volatile memory cell during a program phase and corresponding program circuit
US6809961B2 · kind B2 · utility
6Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2002 |
| Grant date | Oct 26, 2004 |
| Priority date | — |
| Expiry date | Dec 27, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and program-load circuit is for regulating the voltages at the drain and body terminals of a non-volatile memory cell being programmed. These voltages are applied from a program-load circuit connected in a conduction pattern to transfer a predetermined voltage value to at least one terminal of the memory cell. The method includes a step of regulating the voltage value locally, within the program-load circuit, to overcome the effect of a parasitic resistor present in the conduction pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.