Methods of forming dual gate semiconductor devices having a metal nitride layer
US6815285B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2003 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Apr 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a dual gate includes providing a semiconductor substrate that has a first region of a first conductivity type and a second region of a second conductivity type. A gate insulating layer is formed on the semiconductor substrate. An initial metal nitride layer is formed on the gate insulating layer, opposite to the semiconductor substrate. Nitrogen ions are implanted into the initial metal nitride layer in the second transistor region to form a nitrogen-rich metal nitride layer. The initial metal nitride layer is patterned to form a first gate electrode in the first region. The nitrogen-rich metal nitride layer is patterned to form a second gate electrode in the second region. The work function of the nitrogen-rich metal nitride layer is higher than that of the initial metal nitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.