Varied trench depth for thyristor isolation
US6815734B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2002 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Oct 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/676
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is formed having a thyristor and trench arranged to electrically insulate an emitter region of the thyristor from another circuit structure. In one example embodiment of the present invention, a trench having a bottom portion with two different trench depths is etched in the substrate. A thyristor is formed having a control port in a trench and having an emitter region adjacent to the trench and below an upper surface of the substrate. A deeper portion of the trench electrically insulates the emitter region from the other circuit structure. The control port is capacitively coupled to the thyristor and to the other circuit structure (e.g. in response to at least one edge of a voltage pulse applied thereto). In one implementation, the trench further includes an emitter-access connector extending from the emitter region to an upper surface of the substrate. These approaches are also useful in high-density circuit applications, such as memory applications, where the semiconductor device is formed in close proximity with other circuitry, such as with other thyristors. In addition, the isolation approach is useful for applications where a cathode-down thyristor is …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.