Pseudo-synchronous interpolated timing recovery for a sampled amplitude read channel
US6816328B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 13, 2001 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Feb 16, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for reading information stored on a magnetic medium are described. Data symbols are generated from a signal encoded at a baud rate with data including an acquisition preamble defining an acquisition frequency and an acquisition phase. The system includes an inventive dual loop synchronizer that is optimized to improve the operating efficiency and reduce the overall latency of the read channel. In one aspect, the dual loop synchronizer includes a frequency synchronization loop, a signal sampler, an interpolator, and a phase synchronization loop. The frequency synchronization loop is configured to generate a sampling clock synchronized approximately to the acquisition frequency and the acquisition phase of the encoded data signal. The signal sampler is coupled to the frequency synchronization loop and is configured to sample the encoded data signal in response to the sampling clock to produce a plurality of data samples. The interpolator is coupled to the frequency synchronization loop and is configured to produce in response to the sampling clock interpolated samples from the data samples. The phase synchronization loop is coupled to the interpolator and is confi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.