LDMOS and CMOS integrated circuit and method of making
US6818494B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2001 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Jul 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
An integrated circuit (IC) is formed on a substrate. The IC has a first well having a first dopant concentration that includes a second conductivity low-voltage transistor. The IC also has a second well having a dopant concentration equal to the first dopant concentration that includes a first conductivity high-voltage transistor. In addition, the IC has a third well having a second dopant concentration of an opposite type than the first well that includes a first conductivity low-voltage transistor. The first conductivity low-voltage transistor and the second conductivity low-voltage transistor are created without a threshold voltage (Vt) implant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.