Compliant, solderable input/output bump structures
US6818544B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2003 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Apr 14, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4007
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and methods are provided for electrically interconnecting and absorbing stress between a first electrical structure and a second electrical structure. In one embodiment, non-conductive compliant bumps are disposed on at least one of the structures and a metal layer is provided over a surface of the non-conductive compliant bumps. The metal layer facilitates electrical coupling of the metal on the surfaces of the compliant bumps with multiple contact pads of the structure supporting the bumps. The non-conductive compliant bumps can be fabricated of a low modulus material which has a high ultimate elongation property (LMHE dielectric). The LMHE dielectric can have a Young's modulus of less than 50,000 psi and an ultimate elongation property of at least twenty percent. In an alternate embodiment, at least one mushroom-shaped conductive bump is disposed above a compliant dielectric layer on one of the first electrical structure or the second electrical structure. The mushroom-shaped conductive bumps are employed to electrically interconnect the first and second electrical structures. The compliant dielectric layer can be a LMHE dielectric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.