Grounding and thermal dissipation for integrated circuit packages
US6819566B1 · kind B1 · utility
15Cited by
16References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2003 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Oct 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a microelectronic chip package for which grounding and thermal dissipation is desired, a cover is provided having an opening which is aligned with a contact on the substrate connected to ground potential. The cover is connected to the electronic device and the ground contact. This invention provides for a method and electronic package to overcome the difficulties encountered when attempting to simultaneously attach a cover to two different surfaces with two different adhesives.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.