Data output circuit for reducing skew of data signal
US6822490B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2003 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Jun 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00323
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a data output circuit for reducing a skewing error of a data signal, a first inversion unit receives a first data signal of an operating voltage level and inverts the received first data signal to obtain a first inverted data signal. If a first power supply voltage of an output voltage level is different from a second power supply voltage with the operating voltage level by at least a predetermined voltage level, a first voltage compensation unit compensates for the voltage level of the first inverted data signal to obtain a first driving signal. A second inversion unit receives a second data signal with the operating voltage level and inverts the received second data signal to obtain a second inverted data signal. If the levels of the first and second power supply voltages are different by at least a predetermined voltage level, a second voltage compensation unit compensates for the voltage level of the second inverted data signal to obtain a second driving signal. A driver unit receives the first and second driving signals and outputs an output data signal with a logic level that is opposite to the logic levels of the first and second driving signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.