Limiting concurrent modification and execution of instructions to a particular type to avoid unexpected results
US6823445B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2001 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Feb 12, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, program, and system for modifying computer program instructions during execution of those instructions are provided. The invention comprises writing a first instruction into a memory location, wherein the instruction is a patch class instruction. This first instruction is then fetched from the memory location and executed. Concurrent with execution of the first instruction, the memory location is overwritten with a second instruction, which is also a patch class instruction. Because the first and second instructions are patch class instructions, if a program is executing from the memory location, or returns to execute from that location, it will fetch and execute either the first instruction or the second instruction. In one embodiment, reconciling the processor's execution pipeline with the memory location will ensure that the second instruction is fetched and executed if the program returns to execute from that location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.