Shared resource manager for multiprocessor computer system
US6823472B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2000 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | May 11, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shared resource manager circuit for use in conjunction with multiple processors to manage allocation and deallocation of a shared resource. The shared resource manager allocates and deallocates software resources for utilization by the processors in response to allocation and deallocation requests by the processors. The shared resource manager may include a bus arbitrator as required in a particular application for interfacing with a system bus coupled to the processors to provide mutual exclusion in access to the shared resource manager among the multiple processors. The shared resource manager may manage a memory block (FIFO queue) with multiple resource control blocks. A system may advantageously apply a plurality of shared resource managers coupled to a plurality of processors via a common interface bus. Each shared resource manager device may then be associated with management of one particular shared resource.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.