On chip resistor calibration structure and method
US6825490B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Oct 9, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R35/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A structure and associated method to determine an actual resistance value of a calibration resistor within a semiconductor device. The semiconductor device comprises a capacitor, a calibration resistor, and a calibration circuit. A voltage applied to the calibration resistor produces a current flow through the calibration resistor to charge the capacitor. The calibration circuit is adapted to measure an actual time required to charge the capacitor. The calibration circuit is further adapted calculate an actual resistance value of the calibration resistor based on the actual time required to charge the capacitor and a capacitance value of the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.