Ferroelectric transistor with enhanced data retention

US6825517B2 · kind B2 · utility

Assignee

• Cova Technologies, Inc. · US

Inventors

• Klaus Dimmler · Colorado Springs, US
• Alfred P. Gnadinger · Colorado Springs, US

Key dates

• Filing date: Aug 28, 2002
• Grant date: Nov 30, 2004
• Expiry date: Sep 14, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/033

Abstract

Data retention of a ferroelectric transistor is extended by intecting holes or electrons into the ferroelectric transistor when power is removed. The ferroelectric FET has a mechanism to trap charge in a buffer dielectric layer or in the ferroelectric layer sandwiched between a top electrode and a silicon substrate. The state of polarization is detected before power is removed from the ferroelectric FET. Charge is injected into the ferroelectric FET to produce a first threshold voltage when a first polarization state is determined before power is removed. Charge is removed from the ferroelectric FET to produce a second threshold voltage when a second polarization state is determined before power is removed. When the ferroelectric FET is powered up again, the state of charge injected is determined. The ferroelectric FET is then polarized to correspond to a first threshold voltage when the charge state corresponding to the first threshold is determined. The ferroelectric FET is polarized to correspond to a second threshold voltage when a charge state corresponding to the second threshold is determined.