Test configuration for the functional testing of a semiconductor chip

US6825682B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Dieter Kantz · Munich, DE
• Jochen Müller · Hersbruck, DE

Key dates

• Filing date: Apr 5, 2001
• Grant date: Nov 30, 2004
• Expiry date: Apr 5, 2021

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/311
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A test configuration for the functional testing of a semiconductor chip is described. The semiconductor chip, which can be subjected to a functional test for the purpose of checking the functionality of the semiconductor chip, is disposed on a support material. The semiconductor chip contains a self-test unit for generating test information and for carrying out the functional test. An energy source serves for providing an electrical energy supply from energy that is fed in contactlessly. The energy source is disposed on the support material and is connected to the semiconductor chip for the purpose of providing an energy supply on the semiconductor chip. The test configuration makes it possible to carry out a contactless functional test and to reduce the test costs by virtue of high parallelism during the functional test of a plurality of semiconductor chips.