ESD protection circuit for multi-power and mixed-voltage integrated circuit
US6829125B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2001 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Feb 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/819
Abstract
The invention discloses an ESD (Electro Static Discharge) protection circuit, including a resistor device, a capacitor device and a PMOS device. The resistor device is connected in series between a power supply and the capacitor device. The capacitor device is connected in series between the resistor device and the ground. A gate electrode of the PMOS device is connected between the resistor device and the capacitor device. A bulk electrode of the PMOS device is interconnected to a first electrode of the PMOS device, and the first electrode is connected to the power supply. Alternatively, another ESD protection circuit for multiple power supplies includes at least two aforementioned ESD protection circuits, and a common ESD bus. The ESD protection circuits are connected to separate power supplies, and both connected to the common ESD bus. By using the ESD protection circuit, there is no noise between the separate power supplies, and an ESD current could be discharged easily and safely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.