Apparatus and method for dynamically repairing a semiconductor memory
US6829176B2 · kind B2 · utility
11Cited by
45References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2004 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Feb 10, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An architecture for dynamically repairing a semiconductor memory, such as a Dynamic Random Access Memory (DRAM), includes circuitry for dynamically storing memory element remapping information. Memory is tested for errors by writing, then reading a plurality of memory blocks, such as rows or columns, in parallel. Memory is dynamically reprogrammed in order to remap unused spare memory elements for failed memory elements when errors are detected. Unused spare memory elements are remapped utilizing a circuit that overrides unblown fuses or antifuses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.