Multilayer printed circuit board
US6831234B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1997 |
| Grant date | Dec 14, 2004 |
| Priority date | — |
| Expiry date | Sep 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Multilayer printed circuit board includes a core substrate and multilayer wiring layers formed on the core substrate by alternately laminating interlaminar insulating layer and conductor circuit. The multilayer printed circuit board further includes a group of solder pads having solder bumps planarly arranged on an outermost surface of the multilayer wiring layers. Solder pads located in at least one and up to five rows from an outer position of the solder pad group have flat pads connected to a conductor pattern located on the outermost surface and have solder bumps formed on surfaces of the solder pads, while solder pads other than the solder pads connected to the conductor pattern on the outermost surface form an inner layer pad group. Solder pads of the inner layer pad group are connected to viaholes connected to flat inner layer pads located on one of a first inner layer and at least one further inner layer with solder bumps being formed in recess portions of the viaholes, the inner layer pad group comprising solder pads located in at least one and up to five rows from an outer position of the inner layer pad group that are connected through the viaholes to flat pads connected…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.