Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon
US6835621B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2003 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Jun 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of fabricating a non-volatile memory device with a silicon-oxide-nitride-oxide-silicon (SONOS) structure, a silicon nitride layer, which is a charge trapping layer, and a polysilicon layer, which is a control gate electrode, are electrically isolated from one another in the resulting structure. According to the method, a silicon oxide layer as a tunneling layer and a silicon nitride layer pattern as a charge trapping layer are formed on a semiconductor substrate; an oxidation process is performed to form a silicon nitride oxide layer, as a blocking layer, at top and sides of the silicon nitride layer pattern and to form a gate insulating layer at an exposed portion of the semiconductor substrate; and a control gate electrode is formed on the silicon nitride oxide layer and the gate insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.