Lead frame, and method for manufacturing semiconductor device and method for inspecting electrical properties of small device using the lead frame
US6836004B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2003 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Apr 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame comprises a plurality of frame assemblies. Each framework assembly includes a framework, a suspension lead, a die pad, a plurality of inner leads and outer leads, a first tie bar and a second tie bar, and a lead support. The plurality of framework assemblies are disposed alongside of one another in a direction perpendicular to a direction in which the plurality of outer leads extend. A distance between close-set outer leads in each two neighboring frameworks is substantially n times a pitch of the plurality of outer leads in each framework, wherein n is an integer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.