Semiconductor device configured to be surface mountable
US6836025B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2003 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | May 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device circuit formation surfaces of each of a plurality of semiconductor chips can be easily located at even level when the semiconductor chips are arranged side by side so that a process of forming rearrangement wiring is simplified. The semiconductor chips are mounted on a substrate via an adhesive layer in a two-dimensional arrangement. A resin layer is formed on the substrate and located around the semiconductor elements. The resin layer has the same thickness as a thickness of the semiconductor elements. An organic insulating layer is formed over a surface of the resin layer and circuit formation surfaces of the semiconductor elements. A rearrangement wiring layer is formed on the organic insulating layer and electrodes of the semiconductor chips. External connection terminals are electrically connected to the circuit formation surfaces of the semiconductor elements through wiring in the rearrangement wiring layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.