Patent · US Expired

PLL circuit and method for eliminating self-jitter in a signal which is received by a control circuit

US6836188B2 · kind B2 · utility

0Cited by

5References

21Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Jorg Bonhaus · Hilden, DE
Thomas Duda · Duisburg, DE

Key dates

Filing date	May 2, 2003
Grant date	Dec 28, 2004
Priority date	—
Expiry date	May 2, 2023

Classification

Technology area (CPC H)Electricity
CPC primaryH03L2207/50
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

PLL circuit for eliminating self-jitter in a signal which is received by a control circuit, having a phase comparison circuit for producing a phase difference signal, which indicates the phase difference between the received signal and a fed-back output signal from the PLL circuit; having a loop filter for filtering the phase difference signal which is produced; having an oscillator, which is controlled by the filtered phase difference signal, for producing the output signal from the PLL circuit; with the loop filter having a nonlinear transfer function.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.