Method of checking electrical connections between a memory module and a semiconductor memory chip
US6836440B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2003 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | May 31, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Two methods check functional capability of electrical connections between address lines of a printed circuit board of a memory module and address line contacts of an integrated semiconductor memory chip mounted on the printed circuit board. Ruptured solder contacts are conventionally examined optically or investigated by electrical resistance measurements; however, the latter do not work in the case of memory modules with a number of semiconductor chips, the pin contacts of which are connected in parallel by the address lines. The methods make it possible to locate interrupted contacts on individual address lines by the indirect use of a write-read access to the semiconductor memory chip, specifically utilizing the misrouting of writing and reading commands produced by defective contact connections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.