Forming defect prevention trenches in dicing streets
US6838299B2 · kind B2 · utility
12Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2001 |
| Grant date | Jan 4, 2005 |
| Priority date | — |
| Expiry date | Nov 12, 2022 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB23K2103/50
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method of dicing a microelectronic device wafer comprising forming at least one trench in at least one dicing street on the microelectronic device wafer, wherein the trench prevents cracking and/or delamination problems in the interconnect layer of the microelectronic device wafers caused by a subsequent dicing by a wafer saw.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.