Jun He
95Patents
8h-index
115Co-inventors
81Inventor score
Filing activity: Nov 28, 2001 → Jul 8, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7087452B2 | Edge arrangements for integrated circuit chips | Electricity | 39 | Expired |
| US6998216B2 | Mechanically robust interconnect for low-k dielectric material using post treatment | Emerging Cross-Sectional Technologies | 26 | Expired |
| US6919637B2 | Interconnect structure for an integrated circuit and method of fabrication | Electricity | 16 | Expired |
| US7544966B2 | Three-terminal electrical bistable devices | Electricity | 12 | Expired |
| US6838299B2 | Forming defect prevention trenches in dicing streets | Performing Operations; Transporting | 12 | Expired |
| US7071554B2 | Stress mitigation layer to reduce under bump stress concentration | Electricity | 9 | Expired |
| US7662674B2 | Methods of forming electromigration and thermal gradient based fuse structures | Electricity | 8 | Expired |
| USD484620S1 | Cushion block for built-up floor | General | 8 | Expired |
| US11527301B2 | Method for reading and writing and memory device | Physics | 7 | Active |
| US8704336B2 | Selective removal of on-die redistribution interconnects from scribe-lines | Electricity | 6 | Active |
| US6857242B2 | Cushion block for build-up surface made by strips | Fixed Constructions | 6 | Expired |
| US7151051B2 | Interconnect structure for an integrated circuit and method of fabrication | Electricity | 5 | Expired |
| US8058710B2 | Interconnects having sealing structures to enable selective metal capping layers | Electricity | 4 | Active |
| US7402519B2 | Interconnects having sealing structures to enable selective metal capping layers | Electricity | 4 | Active |
| US7348283B2 | Mechanically robust dielectric film and stack | Electricity | 4 | Expired |
| US11315610B1 | Sense amplifier, memory and method for controlling sense amplifier | Electricity | 4 | Active |
| USD924186S1 | Board card | General | 4 | Active |
| US11599417B2 | Error correction system | Physics | 4 | Active |
| US7889013B2 | Microelectronic die having CMOS ring oscillator thereon and method of using same | Electricity | 4 | Active |
| US7679145B2 | Transistor performance enhancement using engineered strains | Electricity | 3 | Active |
| US11894047B2 | Sense amplifier, memory and method for controlling sense amplifier | Physics | 3 | Active |
| US8242831B2 | Tamper resistant fuse design | Electricity | 2 | Active |
| US7402509B2 | Method of forming self-passivating interconnects and resulting devices | Electricity | 2 | Expired |
| US11887655B2 | Sense amplifier, memory, and method for controlling sense amplifier by configuring structures using switches | Physics | 2 | Active |
| US8703547B2 | Thyristor comprising a special doped region characterized by an LDD region and a halo implant | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.