Integrated process for high voltage and high performance silicon-on-insulator bipolar devices

US6838348B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Jeffrey A. Babcock · Neufahrn, DE
• Gregory E. Howard · Dallas, US
• Angelo Pinto · Augusta, IT
• Phillipp Steinmann · Munich, DE
• Scott Balster · Dallas, US

Key dates

• Filing date: May 12, 2004
• Grant date: Jan 4, 2005
• Expiry date: May 12, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/126

Abstract

High-voltage bipolar transistors (30, 60) in silicon-on-insulator (SOI) integrated circuits are disclosed. In one disclosed embodiment, an collector region (28) is formed in epitaxial silicon (24, 25) disposed over a buried insulator layer (22). A base region (32) and emitter (36) are disposed over the collector region (28). Buried collector region (31) are disposed in the epitaxial silicon (24) away from the base region (32). The transistor may be arranged in a rectangular fashion, as conventional, or alternatively by forming an annular buried collector region (31). According to another disclosed embodiment, a high voltage transistor (60) includes a central isolation structure (62), so that the base region (65) and emitter region (66) are ring-shaped to provide improved performance. A process for fabricating the high voltage transistor (30, 60) simultaneously with a high performance transistor (40) is also disclosed.