Debug interface for an event timer apparatus

US6839654B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• René Röllig · Frankenberg, Hesse, DE
• Jens Meyer · Dresden, DE
• Frank Barth · Radebeul, DE
• Alexander Krebs · Munich, DE

Key dates

• Filing date: Feb 7, 2003
• Grant date: Jan 4, 2005
• Expiry date: Feb 7, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F11/3656
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An on-chip event timer apparatus including a hardware timer and a debug interface. The hardware timer includes at least an up-counter for counting clocks of a clock signal, a match register for storing a programmable count value, and a comparator for monitoring whether the up-counter's count value matches the count value of the match register. The debug interface includes enable control unit for enabling the up-counter's operation based on a pre-defined relationship between a state of an enabled signal supplied to said up-counter and an internal state of the hardware timer. Additionally, the debug interface may comprise a clock divider connected to the enable control unit to reduce the clock's frequency in accordance with a pre-programmed divider value. Based on the received clock with the reduced clock frequency, the enable control unit adapts the up-counter's processing speed to the reduced clock frequency.