Processing cluster having multiple compute engines and shared tier one caches
US6839808B2 · kind B2 · utility
20Cited by
9References
41Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2001 |
| Grant date | Jan 4, 2005 |
| Priority date | — |
| Expiry date | Oct 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/822
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multi-processor includes multiple processing clusters for performing assigned applications. Each cluster includes a set of compute engines, with each compute engine coupled to a set of cache memory. A compute engine includes a central processing unit and a coprocessor with a set of application engines. The central processing unit and coprocessor are coupled to the compute engine's associated cache memory. The sets of cache memory within a cluster are also coupled to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.