Method for fabricating embedded nonvolatile semiconductor memory cells
US6841448B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2002 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | Jan 14, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
Abstract
A method for fabricating embedded nonvolatile semiconductor memory cells is described. The method includes forming a first insulating layer on a substrate having a high-voltage region, a memory region and a logic region. The first insulating layer is removed in the memory region, and a second insulating layer is formed. A charge-storing layer is formed and patterned along with a third insulating layer. The first to third insulating layers and also the charge-storing layer are removed in the logic region. A fourth insulating layer is formed and a conductive control layer is formed and patterned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.