Selectable dynamic reconfiguration of programmable embedded IP
US6842034B1 · kind B1 · utility
15Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2003 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | Jul 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Improved communication, and an improved communication interface, between the core PLD fabric of a PLD and embedded IP building blocks resident therein is provided. A circuit according to the invention may include at least two different signal paths between the PLD core fabric and embedded IP building blocks. Either one, or both, of these two paths may be used for configuration and/or implementation of the embedded IP building blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.