Signal via impedance adjustment tool
US6845492B1 · kind B1 · utility
13Cited by
2References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2003 |
| Grant date | Jan 18, 2005 |
| Priority date | — |
| Expiry date | Jul 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09236
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method for adjusting signal via impedance includes identifying a signal via in a circuit design database. The signal via is flagged as having an impedance error. A window is established around the signal via, with the window lying on a single layer. Only vias in the window may be adjusted to minimize the impedance error. At least one via in the window is adjusted to minimize said impedance error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.